1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device, and more particularly, a nonvolatile semiconductor memory device using memory cells each comprising a variable resistive element storing multivalued data.
2. Description of the Related Art
Flash memories which includes a cell array having memory cells with a floating gate structure connected in a NAND connection manner or a NOR connection manner are conventionally well-known as nonvolatile memories that are electrically rewritable. Moreover, ferroelectric memories are also known as memories which are nonvolatile and enable a fast-speed random access.
As a technology for further refinement of memory cells, there is proposed a resistance-changeable memory having a memory cell comprised of a variable resistive element. Examples of such a variable resistive element are a phase-change memory element which changes a resistance in accordance with a state-change between crystal/amorphous of chalcogenide compounds, an MRAM element which changes a resistance by a tunnel magnetic resistance effect, a memory element of a polymeric ferroelectric RAM (PFRAM) which has a resistive element formed of conductive polymers, an ReRAM element (see JP2006-344349A, paragraph 0021) which changes a resistance by application of electric pulses.
The resistance-changeable memories have a memory cell which can be configured by a series circuit of a schottky diode and a variable resistive element instead of transistors, so that stacking is facilitated and a three-dimensional structure can be employed, thereby accomplishing further integration (see JP2005-522045A).
A capacity can be increased by controlling the state of a resistive element in each memory cell to be a multivalued state equal to three values or greater from a high resistive state to a low resistive state.
Such resistance-changeable memories comprise memory cells each of which is provided at an intersection between each of plural word lines and each of plural bit lines which intersect one another and which stores multivalued data. In writing of data in the resistance-changeable memories, in general, a predetermined bit line is selected, a writing pulse in accordance with write-in data of greater than or equal to three values is applied to a word line, thereby changing the resistive state of a variable resistive element of a predetermined memory cell. In this case, however, only a memory cell connected to a selected word line and a bit line can accept write-in of data at a time. Accordingly, in order to realize page write-in that data is written in a page unit comprised of plural memory cells, it is necessary to serially write in data one memory cell by one memory cell belonging to the page, so that it requires a long processing time to write in data.